PSI3GLP_T4 is a low jitter PLL operating from 2GHz to 3.3GHz continuously, and with the output divider it can cover 1/2 and 1/4 speed. PSI3GLP_T4 can be used for a wide range of applications in SERDES transceivers such as XAUI, RXAUI, SGMII, HRIF, SFI, SATA, SAS, FC. It can also be used in many other applications for clock generation.


  • Low jitter PLL for a wide range of applications
  • Output frequencies 2-3.3GHz, 1-1.65GHz and 500-825MHz
  • Reference clock 50-800MHz
  • Power supplies 0.9V and 1.2V
  • TSMC 40nm G